Luiz André Barroso

Luiz André Barroso

Co-Authors

Luiz André Barroso is a Google Fellow. His interests range from distributed system software infrastructure to the design of Google's computing platform. Prior to Google, Luiz was a member of the research staff at Digital Equipment Corporation and Compaq, where his group did some of the pioneering work on multi-core architectures. He has B.S. and M.S. degrees in Electrical Engineering from the Pontifícia Universidade Católica of Rio de Janeiro, and a Ph.D. in Computer Engineering from the University of Southern California. Luiz is a Fellow of the ACM and the AAAS.

Google Publications

Previous Publications

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    Code layout optimizations for transaction processing workloads

    Alex Ramirez, Luiz André Barroso, Kourosh Gharachorloo, Robert Cohn, Josep Larriba-Pey, P. Geoffrey Lowney, Mateo Valero

    ISCA '01: Proceedings of the 28th annual international symposium on Computer architecture, ACM, New York, NY, USA (2001), pp. 155-164

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    Piranha: a scalable architecture based on single-chip multiprocessing

    Luiz André Barroso, Kourosh Gharachorloo, Robert McNamara, Andreas Nowatzyk, Shaz Qadeer, Barton Sano, Scott Smith, Robert Stets, Ben Verghese

    ISCA '00: Proceedings of the 27th annual international symposium on Computer architecture, ACM, New York, NY, USA (2000), pp. 282-293

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    Memory system characterization of commercial workloads

    Luiz André Barroso, Kourosh Gharachorloo, Edouard Bugnion

    ISCA '98: Proceedings of the 25th annual international symposium on Computer architecture, IEEE Computer Society, Washington, DC, USA (1998), pp. 3-14

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    Performance of database workloads on shared-memory systems with out-of-order processors

    Parthasarathy Ranganathan, Kourosh Gharachorloo, Sarita V. Adve, Luiz André Barroso

    ASPLOS-VIII: Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, ACM, New York, NY, USA (1998), pp. 307-318

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    Design options for small-scale shared memory multiprocessors

    Luiz Andre Barroso

    Ph.D. Thesis (1996)

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    Performance Evaluation of the Slotted Ring Multiprocessor

    Michael Dubois, Luiz André Barroso

    IEEE Trans. Comput., vol. 44 (1995), pp. 878-890

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    RPM: A Rapid Prototyping Engine for Multiprocessor Systems

    Luiz André Barroso, Sasan Iman, Jaeheon Jeong, Koray Öner, Michel Dubois, Krishnan Ramamurthy

    Computer, vol. 28 (1995), pp. 26-34

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    The design of RPM: an FPGA-based multiprocessor emulator

    Koray Öner, Luiz A. Barroso, Sasan Iman, Jaeheon Jeong, Krishnan Ramamurthy, Michel Dubois

    FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays, ACM, New York, NY, USA, pp. 60-66

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    The performance of cache-coherent ring-based multiprocessors

    Luiz André Barroso, Michel Dubois

    ISCA '93: Proceedings of the 20th annual international symposium on Computer architecture, ACM, New York, NY, USA (1993), pp. 268-277

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    A methodology for performance evaluation of parallel applications on multiprocessors

    Daniel A. Menascé, Luiz André Barroso

    J. Parallel Distrib. Comput., vol. 14 (1992), pp. 1-14

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    Scalability Problems in Multiprocessors with Private Caches

    Michel Dubois, Luiz André Barroso, Yung-Syau Chen, Koray Öner

    PARLE '92: Proceedings of the 4th International PARLE Conference on Parallel Architectures and Languages Europe, Springer-Verlag, London, UK (1992), pp. 211-230

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    Delayed consistency and its effects on the miss rate of parallel programs

    Michel Dubois, Jin Chin Wang, Luiz A. Barroso, Kangwoo Lee, Yung-Syau Chen

    Supercomputing '91: Proceedings of the 1991 ACM/IEEE conference on Supercomputing, ACM, New York, NY, USA, pp. 197-206