Keun Soo Yim

I'm an experimental computer scientist and an author, working as an engineer at Google. My current research interests are in validation, evaluation, and design techniques for dependable computer systems. I hold >15 United States patents on embedded system management methods and apparatuses, and have published >20 technical papers. I received a Ph.D. degree in Computer Science from the University of Illinois at Urbana-Champaign. My personal page has all the paper and slide files, and a full patent listing.

Google Publications

Previous Publications

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    From Experiment to Design - Fault Characterization and Detection in Parallel Computer Systems Using Computational Accelerators

    Keun Soo Yim

    Ph.D. Thesis, University of Illinois at Urbana-Champaign (2013)

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    Pluggable Watchdog: Transparent Failure Detection for MPI Programs

    Keun Soo Yim, Zbigniew Kalbarczyk, Ravishankar K. Iyer

    In Proceedings of the IEEE International Parallel and Distributed Processing Symposium, IEEE (2013), pp. 489-500

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    A Fault-Tolerant, Programmable Voter for N-Modular Redundancy

    Keun Soo Yim, V. Sidea, Z. Kalbarczyk, Deming Chen, Ravishankar K. Iyer

    In Proceedings of the IEEE Aerospace Conference, IEEE (2012)

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    A Codesigned Fault Tolerance System for Heterogeneous Many-Core Processors

    Keun Soo Yim, Ravishankar K. Iyer

    IPDPS Workshops (2011), pp. 2053-2056

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    Hauberk: Lightweight Silent Data Corruption Error Detector for GPGPU

    Keun Soo Yim, Cuong Pham, Mushfiq Saleheen, Zbigniew Kalbarczyk, Ravishankar K. Iyer

    IPDPS (2011), pp. 287-300

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    Measurement-based analysis of fault and error sensitivities of dynamic memory

    Keun Soo Yim, Zbigniew Kalbarczyk, Ravishankar K. Iyer

    DSN (2010), pp. 431-436

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    Quantitative Analysis of Long-Latency Failures in System Software

    Keun Soo Yim, Zbigniew Kalbarczyk, Ravishankar K. Iyer

    PRDC (2009), pp. 23-30

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    A Software Reproduction of Virtual Memory for Deeply Embedded Systems

    Keun Soo Yim, Jae Don Lee, Jungkeun Park, Jeong-Joon Yoo, Chaeseok Im, Yeonseung Ryu

    Lecture Notes in Computer Science (2006), pp. 1000-1009

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    CATA: A Garbage Collection Scheme for Flash Memory File Systems

    Long-zhe Han, Yeonseung Ryu, Keun Soo Yim

    Lecture Notes in Computer Science, vol. 4159 (2006), pp. 103-112

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    Operating System Support for Procedural Abstraction in Embedded Systems

    Keun Soo Yim, Jeong-Joon Yoo, Jae Don Lee, Jihong Kim

    RTCSA (2006), pp. 378-384

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    A Novel Memory Hierarchy for Flash Memory Based Storage Systems

    Keun Soo Yim

    Journal of Semiconductor Technology and Science, vol. 5 (2005), pp. 69-76

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    A fast start-up technique for flash memory based computing systems

    Keun Soo Yim, Jihong Kim, Kern Koh

    SAC (2005), pp. 843-849

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    A Space-Efficient On-Chip Compressed Cache Organization for High Performance Computing

    Keun Soo Yim, Jang-Soo Lee, Jihong Kim, Shin-Dug Kim, Kern Koh

    Lecture Notes in Computer Science, vol. 3358 (2004), pp. 952-964

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    A flash compression layer for SmartMedia card systems

    Keun Soo Yim, Hyokyung Bahn, Kern Koh

    IEEE Trans. Consumer Electronics, vol. 50 (2004), pp. 192-197

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    An Energy-Efficient Reliable Transport for Wireless Sensor Networks

    Keun Soo Yim, Jihong Kim, Kern Koh

    Lecture Notes in Computer Science, vol. 3090 (2004), pp. 54-64

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    An Energy-Efficient Routing and Reporting Scheme to Exploit Data Similarities in Wireless Sensor Networks

    Keun Soo Yim, Jihong Kim, Kern Koh

    Lecture Notes in Computer Science, vol. 3207 (2004), pp. 515-527

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    NIC-NET: A Host-Independent Network Solution for High-End Network Servers

    Keun Soo Yim, Hojung Cha, Kern Koh

    Lecture Notes in Computer Science, vol. 3320 (2004), pp. 401-405

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    Performance Analysis of On-Chip Cache and Main Memory Compression Systems for High-End Parallel Computers

    Keun Soo Yim, Jihong Kim, Kern Koh

    PDPTA (2004), pp. 469-475

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    A Compressed Page Management Scheme for NAND-Type Flash Memory

    Keun Soo Yim, Kern Koh, Hyokyung Bahn

    VLSI (2003), pp. 266-271