Dan Steinberg
Dan Steinberg is a Hardware Engineer at Google. He has spent the last number of years developing hardware for the data center as part of the platforms team. Prior to joining Google, Dan spent 11 years at IDT designing, verifying, and leading teams working on complex ASICs, including SoCs, PCIe switches, and SSD controllers. Dan has presented several SNUG papers in years past on a range of subjects. His focus over the years has been on DV methodology and full-chip simulations.
He holds a B.S.E.E. from the University of Maryland, and an M.S.E.E. from the Technion in Israel.
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Full-Chip Simulations, Keys to Success
SNUG Silicon Valley 2015 Proceedings, Silicon Valley
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As designs continue to grow larger and ever more complex, full-chip simulations remain a critical component of design verification. These simulations pose a unique set of challenges that require different approaches than those used at the block or sub-chip level. This paper defines the key goals of full-chip simulations and outlines guiding principles to follow when developing a new environment. Special attention is paid to architecting for speed, both speed of simulation as well as speed of debug. Lessons learned over the years along with specific recommendations are presented.
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