I then went on to be an academic at the same university and lead several research projects that explored novel ways to exploit FPGA technology for applications like software radio, image processing and high resolution digital printing, and graphics.
In 1998 I moved to San Jose California to join Xilinx's research lab where I developed a language called Lava in conjunction with Chalmers University which allows circuits to be laid out nicely on chips to give high performance and better utilization of silicon resources.
In 2004 I joined Microsoft in Redmond Washington where I worked on a variety of techniques for producing concurrent and parallel programs and in particular explored join patterns and software transactional memory. In 2006 I moved to Microsoft's research laboratory in Cambridge where I worked on reconfigurable computing and parallel functional programming.
In January 2012 I joined Google in Mountain View.
I hold the Chair of Reconfigurable Systems at the University of Birmingham; I am a Fellow of the IET; a Senior Member of the IEEE and ACM; a visiting professor at Imperial College; and a visiting lecturer at Chalmers in Gothenburg.
Accelerator Compiler for the VENICE Vector Processor
Zhiduo Liu, Aaron Severance, Guy G.F. Lemieux, Satnam Singh
FPGA, ACM (2012)
Resource-bounded multicore emulation using Beefarm
Oriol Arcas, Nehir Sonmez, Gokhan Sayilar, Satnam Singh, Osman S. Unsal, Adrian Cristal, Ibrahim Hur, Mateo Valero
Microprocessors and Microsystems (2012)